The Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is one type of FET transistor.

Metal Oxide Semiconductor Field Effect Transistor or MOSFET.

Junction Field Effect Transistor or JFET.

In case of a FET, the voltage at the Gate (a terminal in FET equivalent to Base in BJT) determines the current flow between the other two terminals.

The other and very important difference is that a BJT is essentially a current controlled device meaning the current at the base of the transistor determines the amount of current flowing between collector and emitter. The first difference is that in BJT, both the majority and minority charge carriers are responsible for current conduction whereas in FETs, only the majority charge carriers are involved. There are two main differences between BJT and FET. To learn more about a basics of transistor and its history, read the Introduction to Transistors tutorial. Transistors come a variety of shapes, sizes and designs but essentially, all transistors fall under two major families. They are semiconductor devices that act as either an electrically controlled switch or a signal amplifier. The logic circuits are self-explanatory.Transistors, the invention that changed the World. Figures (a), (b) and (c) respectively show an inverter, a two-input NOR and a two-input NAND using NMOS logic. VMOS, DMOS and HMOS are only structural variations of NMOS, aimed at further reducing the propagation delay. It is for this reason that most of the MOS memory devices and microprocessors employ NMOS logic or some variation of it such as VMOS, DMOS and HMOS. Also, owing to the greater mobility of the charge carriers in N-channel devices, the NMOS logic family offers higher speed too. N-channel MOS devices require a smaller chip area per transistor compared with P-channel devices, with the result that NMOS logic offers a higher density. The NMOS logic family uses N-channel MOSFETS. It may be mentioned here that the MOSFET being used as load is designed so as to have an ON- resistance that is much greater than the total ON-resistance of the MOSFETs being used as switches. The circuit of Fig.(b) thus behaves like a two-input NOR gate in positive logic. For all other possible input combinations, the output is in logic ‘0’ state, because, with either Q 1 or Q 2 nonconducting, the output is nearly −V DD through the conducting Q 3. This is possible only when both the inputs are in logic ‘0’ state.

ground potential) only when both Q 1 and Q 2 are conducting.

In the logic arrangement of Fig.(b), the output goes to logic ‘1’ state (i.e. Figure (b) shows a PMOS logic based two-input NOR gate. When the input is at −V DD or near −V DD, Q 2 conducts and the output goes to near-zero potential (i.e.

logic ‘1’), Q 2 remains in cut-off and −V DD appears at the output through the conducting Q 1. GND and −V DD respectively represent a logic ‘1’ and a logic ‘0’ for a positive logic system. MOSFET Q 1 acts as an active load for the MOSFET switch Q 2. Figure (a) shows an inverter circuit using PMOS logic (not to be confused with a power inverter). The PMOS logic family uses P-channel MOSFETS.

Nmos transistor theory